Intel Foundry EMIB T Packaging Technology Enhances High Speed Data Transfers and Direct Power Delivery for Large Scale Artificial Intelligence Processers and Data Centers
Intel Foundry has recently revealed the newest generation of their Embedded Multi Die Interconnect Bridge package: EMIB T. In recent official Intel tech papers it was stated that these types of packages are crucial for the very large power and data requirements for new Artificial Intelligence processers. This packaging solution uses the same idea as chiplets and makes it possible to interconnect customized silicon parts on one die rather than manufacturing very large monolithic dies.
Intel Foundry’s packaging technology continues to progress, with EMIB-T serving as the newest advancement this year.
— Intel (@intel) May 26, 2026
EMIB-T adds routing channels directly through tiny silicon bridges that connect different chips. By creating a more direct path for both energy and data, EMIB-T… pic.twitter.com/56IE0F6qN8
Multi chip packaging has typically relied on large, costly silicon interposer silicon that spans across the entire surface of the processer die that serves as the bottom connection layer. Instead of this large silicon block the EMIB connection design simply embeds small high speed silicon bridges in strategic locations where nearby dies need to send signals to each other. Here engineers at the Fab 9 processer manufacturing facility in New Mexico, embedded chips directly onto silicon bridges at the places they are required to transfer signals, allowing 2 nearby data center chips to talk directly across the bridge. This has dramatically reduced the cost of materials required to manufacture a processer and sped up cycle times for high speed communication to and from die by enabling a much faster electrical response.
The core innovation that EMIB T provides is that the routing channels now go straight through the silicon bridge. In past generations power has had to travel around the connection bridge, leading to electrical resistance and slow signals, but now it is routed directly through the bridge, into the silicon component, thus reducing wasted power and creating the fastest signal delivery possible. This is especially important for modern high bandwidth memory because it requires constant power, and has very high speed signal cycles that require much quicker responses.
This new advancement is the key technology enabling Intel Foundry to put disparate chiplets of varying origins onto massive die of all sorts the largest known in the industry. Enabling heterogeneous chiplets makes massive, side by side Artificial Intelligence processing dies for data centers possible while increasing yield and lowering cost compared to a full sized silicon interposer.
