SK hynix Accelerates AI Leadership With Next Generation HBM4E Memory Samples Shipping Early For High Performance Computing
In an effort to establish the company's foothold in the artificial intelligence hardware market, SK hynix revealed that the first samples of the next generation HBM4E memory was shipped to major customers. The chipmaker said this batch of 12 stack dynamic random access memory was shipped to customers sooner than expected by virtue of mature supply chain management and implemented experience. SK hynix intends to work with international partners to ensure that the mass production schedule is synchronized with new hardware release cycles.
This version of high bandwidth memory adapts to significant advances in the rate of data processing and usage. The HBM4E design reaches for each pci a maximum speed of 16 Gb / sec. For some information published in my corporate engineering documentation, we can deduce that the energy efficiency of the silicon is increased of more of 20% than the power consumption of the prior versions of the memory. All those technological advances must decrease the delay of data sending across very complex computing environment, especially in a sizable artificial intelligence data center.
The company was able to deliver samples of the 12 stack HBM4E on schedule thanks to its advanced HBM development and production expertise for HBM.
To meet the high thermal concerns of dense stacking of the chip, SK hynix has adopted its own patent named the Advanced MR MUF (Mass Reflow Molded Under fill) packaging technology. As part of this technology, the team has packed the 48GB capacity inside a 12 layer stack using a process, where a sensitive circuit protected by a liquid material is reintroduced between the silicon plates to provide stability. Additionally, this process provides a heat resistance of 17% more than the HBM4 packaging design thus good for high performance computing.
HBM4E is a direct extension of the manufacturing expertise SK hynix has obtained through producing HBM3, HBM3E and the first generation of HBM4 since 2019. The company also seeks to use this legacy of product reliability to effectively address bandwidth bottlenecks in contemporary hardware architectures.
"Our partners, we and our joint venture will jointly deliver the value we need in the market, while strengthening our technology leadership as a full stack AI memory creator."
Ahn Hyun, President and Chief Development Officer SK hynix said that such new memory standard offers a compelling base for white the company still intends to maintain its AI leadership.
As the samples are in the production customers' hands, the industry trend is towards compliance testing and system integration. The realization of the HBM4E will be a critical enabler for the next generation of accelerator chips, where memory bandwidth is a bottleneck for training large scale neural networks.
