Samsung Showcases zHBM and 400 Layer V10 BV NAND at FMS 2026

Samsung Showcases zHBM and 400 Layer V10 BV NAND at FMS 2026

Samsung has showcased its latest memory architecture prototypes at the Future of Memory and Storage exhibition in California. The lineup includes radical 3D stacking concepts called zHBM and zNAND O alongside a massive 400 layer flash memory chip. But these technologies are still in early development stages as the company pushes to meet the soaring hardware demands of modern artificial intelligence networks.

The standout hardware concept is zHBM, which completely rewrites how memory interacts with processors. Standard designs place high bandwidth memory next to the processor on a circuit board. Samsung is attempting to stack the memory directly on top of the AI accelerator instead. This structural shift is projected to deliver 8 times the speed of the upcoming HBM5 standard while cutting thermal resistance by more than half.

This design also allows for customized silicon integration. Clients can place custom IP between the memory and the accelerator to expand capacity and boost performance. Samsung expects the new wafer bonding technology to pack more than 10 times the memory density of HBM5 into the same space while cutting energy consumption. The company intends to work closely with corporate clients to refine the integration of these processors.

For data storage, the company introduced zNAND O, a product currently in development in 4 and 8 layer versions. It targets edge devices that require fast processing with minimal delay. On the manufacturing side, Samsung showcased its V10 BV NAND flash memory. This chip contains over 400 layers of memory cells. By using wafer bonding technology, the company managed to boost storage density by 58% over previous generation memory.

The road ahead for mainstream memory also saw updates. Samsung confirmed it began shipping HBM4E samples to global business partners back in May after starting mass production on standard HBM4 earlier this year. The company is also promoting LPDDR5X PIM, which processes data directly inside the memory chip to reduce system power draw. These components are being shown off at the current Santa Clara event, where Samsung is running a custom booth containing roughly 30 separate technologies.

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