An engineering sample of an unreleased AMD Ryzen 9 5900X3D processor has surfaced online via the Chiphell forums. The prototype features 12 cores, 24 threads, and an asymmetrical 128MB L3 cache configuration built on the AM4 socket. Leaked testing shows the chip can boot on older motherboard firmware, confirming AMD explored dual CCD stacked cache designs during the Zen 3 generation.
The leaked silicon carries the identifier code 100 000000652 and belongs to the B2 stepping of the Vermeer processor family. It combines 2 physical core compute dies, but only 1 die features stacked 3D V Cache memory. This setup results in an asymmetrical pool of 32MB on the standard die and 96MB on the stacked die, delivering a combined 128MB of L3 cache. Clock speeds reach a maximum boost of 4.85 GHz, while operating within a 105W thermal design power envelope.
Testing shared by user forum posts indicates the processor does not boot with modern motherboard BIOS releases. The prototype requires an older UEFI environment running SMU version 56.70.0 to initialize successfully. This limitation reflects the early testing phase of stacked cache technology on the AM4 platform. While AMD restricted its retail Zen 3 gaming lineup to single die models like the Ryzen 7 5800X3D, this prototype proves the company actively evaluated 12 core dual die configurations before shelving the retail launch.
Source: chiphell
