JEDEC Releases LPDDR6 Standard for Future Tech
The JEDEC Solid State Tech Group has now put out the JESD209-6 LPDDR6 standard, following LPDDR5 and LPDDR5X. This new low-power memory rule aims to lift speed, work, and safety across many areas, like mobile tech, edge AI, client setups, data hubs, and cars.
JEDEC LPDDR6 Memory Rule for AI and Phones
Key Upgrades in the LPDDR6 Standard LPDDR6 brings new build changes over past ones to meet the needs of top work tasks now.
Speed Lifts
To deal with AI and other big jobs, LPDDR6 has a Dual Sub-Channel Build. Main speed traits are:
- Two 12-bit sub-channels per die (2x12 DQ), an upgrade from LPDDR5's one 16-bit channel, made for better time and reach speeds.
- Easy burst length change control for both 32B and 64B reach.
- Active write NT-ODT (non-target on-die end) to boost signal based on job needs.
Power Work
The rule works at a lower pace to cut power use. More power-cut traits are:
- DVFSL (Dynamic Voltage Frequency Shift for Low Power): Lowers the power need during slow jobs.
- Dynamic Work Mode: Lets one sub-channel run in low-power times for clear work wins over LPDDR5.
Safety and Sureness
To keep data safe and things stable, LPDDR6 adds many sureness boosts:
- On-Die Error Fix Code (ECC).
- Per Row Turn Count (PRAC) to keep data safe.
- Command/Address (CA) match and Memory Self-Test (MBIST) for better error checks.
- A Meta Region Carve-out trait to set aside memory spots for key tasks.
How It Changes the Field
Mian Quddus, JEDEC Boss, said, "With a mix of power work, strong safety picks and high speed, LPDDR6 is set to be a top pick for next-gen mobile devices, AI and linked apps in a power-smart, high-speed world."
The new LPDDR6 rule is set for big use. Big names like MediaTek, Micron, Samsung, SK Hynix, and Qualcomm Tech have helped make it and are likely to be first to use this new memory rule in their goods.
Source: JEDEC Solid State Tech Group Press Info.