New Approach Permits the Fabrication of Denser Chips, but Not by Altering the Process
A research team at Samsung Electronics and American universities has devised a method for increasing the density of transistors on one chip by placing additional layers of integrated circuits exactly on top of the existing chip.
Overcoming Manufacturing Temperature Limits
In the conventional CMOS method of chip fabrication, sequential deposits of transistors, metals, and insulators are layered onto a silicon wafer. Construction beyond a certain limit needs to be performed at high temperatures capable of damaging or destroying fragile transistor layers already laid.
The Indium-Oxide Answer
The new scientific solution tackles this thermal problem. The researchers employed an ultra-thin, 2-nanometer layer of amorphous indium oxide to act as an insulator for the extra transistors. This material can be processed at much lower temperatures compared with conventional solutions, thus preventing heat damage to the underlying transistor layer during fabrication.
Possibilities for Future Chips
Thus far, the research team was able to increase the overall transistor density of the chip. This could lead to a possible dramatic increase in a chip's computing capabilities without the cost and hassle of transitioning to a new manufacturing technology node. However, being in its infancy, the technology still requires refinements before it can be commercially applied.
