Intel Foundry Expands AI Semiconductor Business with 120x120mm Large Area Packaging Technology to Increase HBM Capacity and Processing Power
Intel expands its AI semiconductor business through the introduction of large area packaging technology. The Intel Foundry uses advanced packaging technology which it describes as "large area" to compete with other companies in the AI semiconductor market. Intel introduces a new chip dimension of 120x120mm which replaces the 100x100mm standard used by its competitors who produce NVIDIA's Blackwell chips. The company expands its physical space to create more room for equipment which enables it to produce better components than TSMC and Samsung Electronics who are established foundry competitors.
The transition to a larger 120x120mm footprint allows for a significant increase in the density of computing units and memory. The primary benefits include
- Increased Memory Capacity While standard 100x100mm packages typically house 8 High Bandwidth Memory (HBM) chips, Intel’s 120x120mm design accommodates at least 12 HBM units.
- Silicon Integration The expanded area provides additional space for the integration of multiple Graphics Processing Units (GPUs) and Central Processing Units (CPUs) within a single package.
- Performance Scaling Larger packages facilitate higher data throughput and processing power, essential for evolving AI training requirements.
The Embedded Multi die Interconnect Bridge (EMIB) technology serves as a key element of Intel's foundry operations. The latest version of EMIB technology introduces Through Silicon Via (TSV) features into its existing silicon bridge design. This advancement is specifically engineered to support HBM4, the next generation of AI memory. The EMIB T architecture focuses on maintaining stable power delivery to high consumption AI chips while ensuring low latency communication between the various dies in the package.
Intel's technical roadmap shows that 120x120mm serves as an initial point before reaching its final destination. The company plans to enter the high end AI infrastructure market through its current expansion efforts
- 2028 Target Release of a 120x180mm package designed to hold up to 24 HBM chips.
- Long Term Vision Scaling package sizes up to 250x250mm to meet the demands of future AI diffusion.
- External Foundry Opening Intel has shifted its business model to allow external customers access to these proprietary packaging processes, moving beyond its previous internal only manufacturing focus.
Engineering challenges arise from the need to increase semiconductor package sizes because it causes substrate warping problems and decreases yield rates. Intel invests in advanced materials and TSV based interconnects to reduce these manufacturing risks. Intel develops a solution for stability issues which will grant external AI chip designers access to a distinct value proposition that better suits their requirements than standard 100x100mm packaging.
