AMD Versal Premium Gen 2 Adaptive SoC Revolutionizes High Performance Computing with Integrated LPDDR5X Memory and Advanced Space Saving Architecture
AMD has added to its adaptive silicon options with the Versal Premium Gen 2 Memory on Package adaptive system on chip. This latest feature marries up to 32GB of LPDDR5X memory within the package around the core fabric to address the physical limitations of high performance computing. By sharing the memory interconnect routing within the core, the platform delivers up to 288Gb s of memory bandwidth while occupying as much as 60 percent less space than a traditional discrete board design.
Designed for implementation within limited space and restricted power environments, the integrated memory approach specifically targets test equipment, professional video infrastructures, and military communications hardware. Sumit Shah, the head of product management and marketing within the Adaptive and Embedded Computing Group at AMD, identified how the integrated approach removes the obstacles experienced in traditional architectures:
Our customers can design for the system they want to build, not the one their memory constraints allow, and bring it to market faster.
By placing the LPDDR5X memory directly within the package, the architecture speeds up the results achieved when compared to a simple in board memory configuration. This opens up ways for engineers to create complex machines within small units like the Enterprise and Datacenter Standard Form Factor or 3U VPX military equipment units. External discrete memory chips are difficult to implement within these design formats due to the tight wiring tolerances required for high speed signals.
The silicon based design allows for memory speeds up to 9000Mb s and is capable of system level operation within external Compute Express Link memory pooling and expansion modules. When moving large quantities of data fast, the devices make use of hard intellectual property blocks to provide CXL 3.1 and PCIe 6.0 operations at 64Gb s. This supports reliable and rapid communication when the adaptive system on chip is used in tandem with AMD EPYC central processing units within data hungry server nodes.
The devices are designed for use in harsh operating environments, providing industrial grade power at temperatures from 40 degrees below zero Celsius to 110 degrees Celsius. To support the long life cycles experienced within aerospace, defense, and telecommunications deployments, AMD supplies a product availability lifecycle support of 15 plus years. This long life cycle release relieves the need to match high bandwidth memory modules with shorter product life data center units.
Security of data reaches both the hardware as well as the connection lane. The integration of PCIe 6.0 brings in Link Integrity and Data Encryption for high speed data in flight protection at the link layer against tampering in the physical hardware. Thanks to integrated memory controllers, data at rest is protected by auto encryption, which also leaves the chip's programmable elements free to perform other tasks. Heavy duty 400G High Speed Crypto Engines ensure security does not result in slower network operations.
The in built pre validated memory interface removes the need for design engineers to find a way to route complicated high speed memory traces around the motherboard. This simplified process reduces the chances of signal degradation, cuts down on costly motherboard respins, and accelerates testing procedures. Development work can begin with standard AMD Versal Premium Gen 2 variants with support for well established Vivado and Vitis software toolchains.
