Cerebras has introduced the CS 4, a rack scale machine that the company claims is the fastest AI accelerator in the industry. The hardware runs on a fresh modular platform called Nexus, housing 3 giant silicon wafers built to accelerate massive language models. But the bigger shock came during the HOT CHIPS presentation in Palo Alto, where engineers previewed a long term plan to stack memory directly on top of future wafers.
Scaling AI hardware usually means dealing with messy cables and wasted electricity. Cerebras designed the Nexus rack to sidestep those problems. The system splits hardware into modular compute backpacks that slide straight into the rear of the cabinet. This allows datacenter teams to drop in replacement units without tearing apart the entire rack or draining liquid lines.
Power delivery saw a massive physical redesign. Traditional GPU setups place converters roughly 50 millimeters away from the computing cores, losing power through copper circuit boards. CS 4 moves the power converters to within 0.5 millimeters of the wafer itself. That is 100x closer than standard hardware. This setup delivers nearly double the electrical current at the same voltage while cutting out unnecessary heat loss.
Cooling is isolated inside each individual backpack. Technicians get dry quick disconnect valves, meaning a damaged module can be pulled while the rest of the rack stays online. Up front, the main power bay holds up to 30 air cooled power supplies running 54.5 volts DC. It supports redundant wiring configurations like 4 plus 1 or 4 plus 2, letting operators plug the cabinet directly into high voltage industrial feeds.
Cerebras is already showing off what comes next. The company laid out performance targets for its upcoming CS 5 system, which targets 10000 output tokens per second per user on open source weights like Gemma 4 31B and gpt oss 120b. For massive frontier systems like GPT 5.6 Sol, the target sits at 5000 tokens per second per user. High speed generation is critical for AI agents that need to string together dozens of automated reasoning steps in seconds.
The CS 6 system will take wafer scale computing into 3D. Because a single wafer already uses all available horizontal room, the only way to add raw memory capacity is by building upward. Cerebras plans to bond 3D stacked DRAM directly to the compute wafer with ultra high bandwidth connections. Stacking memory directly on the wafer keeps data local, letting gigantic models run on a tiny fraction of the physical datacenter space.
The real bottleneck in modern datacenters is communication speed between chips. Nvidia scales its hardware by linking dozens of separate graphics chips across thousands of copper wires. An Nvidia Rubin NVL72 rack relies on roughly 5000 internal cables to achieve 260 terabytes per second of interconnect bandwidth. All those cables add latency, consume watts, and create physical failure points.
Cerebras handles data traffic directly on the silicon. A single WSE 3T wafer delivers 53.5 petabytes per second of fabric bandwidth. That is over 200x the scale up bandwidth of an entire 72 GPU server rack. By keeping tensor communication locked inside the wafer boundaries, the system avoids networking delays entirely. Data stays fast, the footprint stays small, and operators avoid the headache of managing miles of internal server wiring.
