TSMC Moves Liquid Cooling Directly into AI Chip Packaging to Handle 4100W Power Loads

TSMC Moves Liquid Cooling Directly into AI Chip Packaging to Handle 4100W Power Loads

AI hardware is hitting a thermal wall as single package power threatens to exceed 4100W. TSMC is preparing for this shift by moving liquid cooling directly into the chip packaging itself rather than relying purely on external server rack coolers. But cooling silicon at this extreme density requires redesigning the packaging structure from the ground up to prevent thermal failure.

Speaking at the SEMICON Taiwan Heterogeneous Integration Summit, TSMC advanced packaging research director Chen Yen Ming explained how artificial intelligence compute demands are reshaping hardware physics. Advanced packaging is getting much larger. Modern CoWoS designs combine multiple logic dies with massive stacks of high bandwidth memory. This density causes package power to jump from roughly 600W to an extreme 4100W, increasing power delivery loss by more than 5 times.

Standard cooling methods simply cannot keep up with this concentration of heat. TSMC projects that over upcoming silicon generations, the transistor count inside a single package will jump by over 48 times. Memory bandwidth will grow by more than 34 times. Total package heat is expected to rise 6 times over the same period. Air cooling is completely out of the question for these loads, forcing engineers to bring liquid directly to the silicon surface.

Current liquid cooling setups place skived fin cold plates on top of package lids. This layout forces heat to travel through 1 or 2 layers of thermal interface material before reaching the fluid. TSMC is working on the next phase, which integrates microchannels directly into the package lid itself. This design cuts the thermal interface layers from 2 down to 1, shortening the distance heat must travel. Research teams are also evaluating jet impingement and 2 phase boiling mechanisms to pull heat away even faster.

Upgrading external cooling equipment alone will not solve the problem. Chen pointed out that co designing the package, thermal materials, and chip floorplan lowers the thermal resistance from junction to ambient by up to 40%. Engineers must plan dummy metal gates, heat spot placements, and structural lid designs during the earliest drafting stages of the chip. Cooling is no longer an afterthought added at the end of manufacturing.

This technical transition is opening massive business opportunities across the cooling hardware market. Liquid cooling demand is expanding from basic server racks straight into specialized components. Manufacturers of microchannel lids, cold plates, coolant distribution units, plate heat exchangers, and blind mate quick connectors are retooling their factories. As power figures for GPUs and custom cloud accelerators climb higher, the entire supply chain is shifting to meet these high precision thermal requirements.

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Majid T.
Majid T.
Owner of Technetbook | 10+ Years of Expertise in Technology | Seasoned Writer, Designer, and Programmer | Specialist in In-Depth Tech Reviews and Industry Insights | Passionate about Driving Innovation and Educating the Tech Community Technetbook

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